San Francisco reported that today, AMD officially released the second-generation EPYC server processor with a "violent aesthetics" in the 100-year-old Art Palace in San Francisco. The server chip product codenamed "Rome" is not only a 7nm X86 server chip. The world premiere, and AMD's first surpassing Intel in the process, has revolutionized performance, architecture and cost.
"This is the world's strongest X86 server chip, no one, we have created more than 80 world records! We will reshape the standards of the modern number center and continue to rewrite the rules of the game in the field of server chips." For the second generation Long, at the press conference, AMD President and CEO Su Zifeng did not regret her praise.
The strongest X86 server chip on the surface
In the year before the conference, the second generation of Xiaolong "Rome" has already passed two warm-ups, which shows AMD's expectation and attention.
First, in November last year's "Horizon Summit", "Rome" made its debut. Second, at the Taipei Computer Show in May this year, Rome was introduced in the third quarter of this year. It can be said that apart from the price, some basic parameters of Rome are not suspenseful. .
Process, architecture and cost advantages are significant labels for "Rome". AMD not only got the first launch of the 7nm global X86 server chip, but also led Intel for the first time in the process.
The 7nm process brings many advantages and achieves significant computational efficiency improvements, including a 2x transistor density, 50% reduction in power consumption (under the same performance), and a 25% performance increase (under the same power consumption). In the server chip space, core quantity, performance and power consumption will be the most important indicators.
Su Zhifeng said that "Rome" is the most powerful chip in the current X86 server chip, with more than 80 record performance, which can reduce the total cost of ownership (TCO) by 50% under various workloads.
"Rome" is based on the new Zen 2 architecture. According to the information released by AMD on COMPUTEX, the Zen 2 architecture for consumer can achieve up to 15% IPC performance improvement compared to the previous generation architecture. In addition, according to the roadmap of AMD, the design of Zen3 architecture has been completed, and the architecture of Zen4 is in the design.
Compared to the first generation of AMD EPYC server chip "Naples", "Rome" can provide 2 times performance per slot, up to 4 times the performance of floating point performance. According to AMD, there has never been such a significant increase in the history of server chips.
The "Rome" single CPU can have up to 64 physical cores (128 logical cores). Each processor has eight CPU chips manufactured in a 7nm process, with eight physical cores integrated in each Die. The 64 core is currently the largest number of server chips (Intel's latest Xeon flagship chip 9282 has only 56 cores).
It is understood that "Rome" adopts the revolutionary "Chiplet" modular design. While having a dedicated computing core Die, there is also a dedicated I/O Die, which uses a mature 14nm process technology and is responsible for input and output control. It is understood that I/O Die uses 14nm process instead of 7nm because of it. It contains a large number of analog circuits, which are not obvious and costly if the 7nm process is used. And the core design of such "8+1" modularity also makes the stacking difficulty, cost, and yield increase.
Rome EPYC is also the first X86 server-class CPU to support PCI-E 4.0 technology, doubling the number of bandwidth channels, greatly improving the performance of the accelerator, with the new acceleration card Radeon Instinct MI60, which also supports PCI-E 4.0 technology, can bring unprecedented Accelerate performance. At the same time, whether it is the existing generation of "Naples", or the second generation of "Rome", and the next generation of "Milan", EPYC (霄龙) will remain platform compatible, users can upgrade seamlessly.
Performance Cost Hammer Intel?
The second generation of Xiaolong processor "7002" series, a total of 19 models, including 14 dual-channel, five single-channel models, of which the two-way flagship model is Xiaolong 7742, 64 core 128 thread, 256MB three-level Cache, reference frequency 2.25GHz, acceleration up to 3.4GHz, default thermal design power consumption 225W, up to 240W, price $6950.
As the only two major players in the server chip, AMD and Intel have always existed.
At the "Next Horizon" summit in November last year, AMD demonstrated a time comparison of rendering the same pixel image with a 64-core Rome EPYC and two top-of-the-line Platinum Xeon 28-core Xeon Platinum 8180M chips. The results show that the "Rome" takes less time and achieves a "single pass and double path" in performance.
At the 2019 Taipei Computer Show in May this year, AMD once again compared "Rome" with Intel's Xeon series 8280 chip. In the NAMD (Molecular Dynamics High Performance Computing Application) test, the results show that Intel 28 core Xeon The performance of the processor 8280 is 9.68 ns/day, while the performance of the "Rome" processor is as high as 19.60 ns/day, which has doubled the performance of the former.
At today's meeting, AMD also used the second-generation Xiaolong flagship 7742 and Intel Xeon flagship 8280 to show the comparison of molecular dynamics simulation. The results show that the former has 1.6 times performance improvement.
More directly, AMD "roughly" directly moved out of the price comparison, compared with the 28-core Intel Xeon 7742, AMD's second-generation EPYC under the premise of twice the performance, the cost is only half of the other party.
Rebuilding modern data center standards
At the press conference, Su Zifeng said that from the launch of the original Snapdragon EPYC "Naples" in 2017 to the current second generation "Rome", AMD will increase memory and I/O interface by injecting more cores into the product. Other ways, leading to significant changes in leading performance, lower power and cost, define standards for data center market centers. The second-generation Snapdragon chip "Rome" will bring nearly twice the performance boost to modern data centers, reducing costs by half.
The second-generation AMD EPYC processor is designed for modern data center workloads and delivers leading-edge performance for a wide range of enterprise, cloud and high performance computing (HPC) workloads. For enterprise data centers, the second-generation AMD EPYC processor delivers up to 83% improvement in Java application performance, up to 43% SAP SD 2 Tier performance, and a world record for Hadoop real-time analytics performance.
For modern cloud computing and virtualized work environments, the second-generation AMD EPYC processor provides a world-recorded virtualization performance that redefines the economics of the data center.
For high-performance computing, the second-generation AMD EPYC processor offers an unbeatable combination of record-breaking floating-point performance, the highest DRAM memory and I/O bandwidth in its class for ultra-strong HPC loads; 2x computational fluid dynamics and up to 72% better structural analysis performance.
The ecosystem continues to grow. Google Twitter announces deployment
Since the launch of the first-generation Zen architecture of the Snapdragon “Naples” in 2017, AMD has not concealed its ambitions in this field. Apart from the need for product performance, it is also inseparable from the perfect ecology and more. Multi-partner support.
Based on the first generation of EPYC processors, the second-generation EPYC processor has further expanded AMD's camp. According to Su Zifeng, the ecological construction has not been delayed due to the adoption of new technological processes, but has been further strengthened.
It is understood that the AMD EPYC ecosystem has more than 60 partners. This extensive ecosystem of partners includes original design suppliers such as Gigabyte and QCT, and independent hardware vendors (IHV) such as Broadcom, Micron and Xilinx. And got support from Microsoft and multiple Linux operating system vendors. The Linux operating systems such as Canonical, RedHat and SUSE have partnered with AMD to extensively test and validate the second-generation AMD EPYC processor in data center applications. This helped the second-generation AMD EPYC processor to have more than 2x the development platform than the first-generation EPYC processor.
At today's conference, a number of customers and partners came on stage with AMD to discuss the new AMD EPYC processor deployment.
Among them, Google announced that they have deployed the second-generation AMD EPYC processor in the internal infrastructure production data center environment, and will support a new general-purpose computer based on the second-generation AMD EPYC processor on Google Cloud Engine in late 2019. Twitter also announced that they will deploy a second-generation AMD EPYC processor on the data center infrastructure later this year, reducing total cost of ownership (TCO) by 25%. In addition, it also includes Microsoft, HPE, Lenovo, Dell and other vendors.
The market expects the EPYC series to be cost effective. Especially after the second generation of Xiaolong "Rome" is listed, AMD is expected to further expand its market share in the server field. According to Taiwan media Digitimes, AMD is expected to gain 10% of the server chip market share next year.
Forrest Norrod, senior vice president and general manager of AMD's data center and embedded solutions division, said in an interview with Episodes at the 2019 Taipei Computer Show that after the launch of Rome, the growth rate must be a very steep curve because Many orders see a very strong demand in the market.
Looking now, support from a wide range of ecosystems is key to the success of the ECYC series.